Senior Research Engineer II, fan-in/fan-out wafer-level pkg, 2.5D interposers, Adv Pkg, IME

IME's Advanced Packaging Programme is looking for a passionate Engineer to drive prototyping and small-volume manufacturing activities using state-of-the-art packaging platforms such as fan-in/fan-out wafer-level packaging, 2.5D interposers, and W2W/C2W 3D integration. The successful candidate will play a key role in developing innovative package architectures, advancing technology demonstrations, and working closely with researchers and industry collaborators to translate concepts into functional prototypes. The role focuses on delivering high-quality products, ensuring process stability, coordinating manufacturing operations.

Job Responsibilities

• Plan, coordinate, and execute prototype and small-volume manufacturing runs using advanced packaging technologies, including Fan-In/Fan-Out Wafer Level Packaging (FOWLP), 2.5D interposers, and W2W/C2W 3D integration.
• Develop manufacturing plans, process flows, and work instructions to meet customer and project requirements.
• Monitor production activities, troubleshoot process issues, and implement corrective actions to improve yield, quality, and cycle time.
• Work closely with process, equipment, and quality engineers to ensure stable and repeatable manufacturing performance.
• Coordinate wafer and material logistics, production scheduling, and resource allocation to ensure on-time delivery.
• Perform process monitoring, yield analysis, failure analysis, and root-cause investigations.
• Support customer prototype builds, engineering lots, and qualification activities.
• Drive continuous improvement initiatives to enhance manufacturing efficiency, quality, and operational excellence.
• Maintain manufacturing documentation, including process specifications, manufacturing reports, and quality records.
• Ensure compliance with safety, quality, and operational procedures

Job Requirement

• Bachelor's, master’s degree in electrical engineering, Materials Science, Mechanical Engineering, Microelectronics, or a related discipline.
• 5-10 years of experience in semiconductor manufacturing, advanced packaging, process integration, or related fields.
• Knowledge of semiconductor packaging processes such as lithography, plating, RDL formation, wafer thinning, bonding, molding, and assembly is advantageous.
• Hands-on experience in prototype builds or low-volume manufacturing environments.
• Knowledge of 2.5D/3D IC integration, hybrid bonding, chiplet packaging, or heterogeneous integration technologies.
• Experience with manufacturing execution systems (MES), quality management systems, and process qualification methodologies.
• Familiarity with statistical process control (SPC), yield analysis, and problem-solving methodologies.
• Strong analytical, troubleshooting, and data analysis skills.
• Ability to work effectively in a multidisciplinary team environment and interact with internal and external stakeholders.
• Excellent communication and project coordination skills.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.