Senior Engineer - Design Enablement Design Manual Engineer

Summary of Role

This position is within GlobalFoundries RF Design Enablement team with focus on ground rule development and Silicon Validation (GRV).The Ground Rule Validation (GRV) is part of the Design Manual Engineering (DME)/Design Enablement team that creates and supports the Design Rules based on technological, manufacturing and business considerations. The Design Manual itself is one of the key components of the Process Design Kits (PDKs) provided by GF.

These Design Rules (or Ground Rules) must be carefully engineered and qualified to ensure the competitiveness and manufacturability of GF technologies. This qualification is performed by the Ground Rule Validation team.

The Design Manual Engineering (DME) team is a very dynamic and international team of experts, involved in development projects with the US, Germany, and Singapore manufacturing sites.

The team is also a very active player in GF innovation and patent submissions. We cover a broad range of projects, which offers many opportunities for new technical solutions and ideas.

Responsibilities

• Work closely with Program Managers, Manufacturing teams (Process Integration), Customer engineers, Benchmarking teams to identify and understand the key technological features that need to be controlled and secured by Design Rules.

• Create layout Designs of Experiment (DoE) and design Test Structures that will be delivered on Test vehicles.

• Perform rigorous Silicon data analysis and efficiently communicate the conclusions to Design Rule engineers, as well as Integration teams.

• Champion modifications of process or Design Rules based on data to optimize GlobalFoundries’ technology portfolio.

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements, and programs.

• After taking the GRV training curriculum, the new team member will start with the technologies manufactured in Fab9/8 (US) or Singapore.

• His/her primary role will also include the GRV validation of the transfer technologies to ensure the full compatibility of the current Design Rules with the respective fabrication line.

Required Qualifications:

• Bachelor's degree in Electrical Engineering, Materials Science, Solid State Physics, or other relevant engineering disciplines.

  4 years experience in similar role

• Strong data analysis, data mining and problem-solving skills.

• Understanding of semiconductor process fabrication flow, nanofabrication, solid state and semiconductor device physics and design of experiments (DOE) methodology

• Strong interpersonal skills; team player; able to work effectively in a dynamic, fast-paced environment. Strong written and oral communications skills

• Familiarity with EDA tools such as Cadence Virtuoso Virtuoso Schematic Editor, Virtuoso Layout Suite, Calibre (DRC, LVS) is a big plus.

Preferred Qualifications

• MS in Electrical Engineering, Electrical Computer, Solid State Physics, Materials Science, or other relevant engineering discipline plus 0-2 years of Semiconductor industry experience in device, process integration or unit process areas preferred.

• PhD in Electrical Engineering, Electrical Computer, Solid State Physics, Materials Science, or other relevant engineering discipline

• Demonstrated ability to solve complex, non-recurring problems combined with strong initiative and creativity resulting in high degree of innovation.