Staff/Principal Engineer - HIG HBM - PE Design Validation

Main Responsibilities:

• Technical Leadership and Cross-Functional Collaboration: Lead technical discussions and serve as a key interface between Design, Manufacturing, Test and Quality internal departments as well as external customers. Internal collaboration with PE teams will be crucial as well. Drive issue prioritization, alignment, and closure across multiple organizations throughout the product lifecycle.

• Validation Strategy and Execution: Define and execute comprehensive validation plans for HBM products, including design validation, test mode validation, using simulation, data analysis, and ATE/bench analysis. Develop validation methodologies to ensure product robustness, manufacturability, and customer readiness.

• Complex Root Cause Analysis and Debug: Lead root cause investigation for Silicon, manufacturing, test, quality, and customer issues utilizing hardware debugging, circuit simulation, statistical analysis, and failure analysis techniques.

• Promotion of Innovation and Challenge Status Quo: Drive innovation initiatives that improve validation coverage, test efficiency, debug turnaround time, and product quality. Challenge existing methodologies and introduce new approaches aligned with business objectives.

• Data Analysis and Risk Assessment: Utilize advanced statistical analysis and data mining techniques to identify trends, assess risks, improve validation coverage, and accelerate issue resolution. Develop automated data analysis solutions to improve engineering productivity and decision making.

• Product Architecture and Design Understanding: Develop deep understanding of HBM architecture, JEDEC specifications, memory subsystems, and test methodologies.

• Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work.

AI Responsibilities:

• Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.

• Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work.

Requirements:

• Bachelor's or Master's degree in Electrical & Electronics Engineering, or a related field, or equivalent experience.

• 5+ years of relevant experience in Design Validation, Product Engineering or related disciplines.

• Strong knowledge of Memory Architecture (DRAM, LPDDR, HBM preferred), VLSI, semiconductor process, and device physics.

• Exposure to Schematic, Simulation, Data Analysis, Lab Debug or Pattern Manipulation.

• Experience with either: Verilog, VHDL, or System Verilog

• Excellent in problem-solving and analytical skills

• Self-motivated and passionate to learn and excel in a fast-paced environment.

• Ability to work effectively in team-based projects, contributing to shared goals and outcomes.