Technical Manager, Layout (CAD & APR Automation)

Role Overview

We are seeking a highly skilled Layout Engineer with exceptional CAD capabilities to join our Custom Layout engineering team. This role combines hands-on APR layout implementation with advanced CAD automation expertise, empowering you to execute layout designs while revolutionizing productivity through workflow automation and methodology innovation.

Job Responsibilities

APR Layout Implementation

• Execute full-cycle APR layout using Innovus, ICC2, or Fusion Compiler for Foundation IP, Analog IP, RFIC, and digital blocks
• Serve as DRI for layout automation flows including APR implementation, physical verification, and sign-off
• Perform floorplanning, power mesh planning, critical block placement, and hierarchical layout construction
• Optimize layouts for Power, Performance, and Area (PPA) through iterative refinement
• CAD Layout Support & Automation
• Provide centralized CAD layout support to Foundation IP, Analog/RF, and SoC teams across multiple projects
• Create, maintain, and enhance automated layout workflows from development through production deployment
• Develop scripting utilities using Python, Tcl, SKILL, Perl to automate tasks and streamline processes
• Build scalable CAD infrastructure including parameterized cells (p-cells), reusable templates, and modular architectures
• Incorporate AI and Agentic AI technologies into layout workflows to boost productivity
• Establish standardized CAD procedures and best practices across diverse project executions
• Process Node Expertise & Verification
• Apply backend layout knowledge across planar, FinFet, and GAA process nodes from leading foundries
• Master complex DRMs, DFM requirements, and physical verification flows for advanced technologies
• Conduct physical verification (DRC/LVS/ERC/ANT/PERC) with expert-level debugging
• Ensure layout compliance with EM/IR, SI/PI, and ESD integrity requirements
• Create new flows or methodologies to boost team productivity

Requirements

• Bachelor's Degree in Electrical/Electronic Engineering or related field
• 8+ years of experience in both APR layout implementation AND CAD/automation development
• Strong CAD capability — proven track record of workflow/tool/script development that improves productivity
• Hands-on proficiency with APR tools: Cadence Innovus, Synopsys ICC2, and/or Fusion Compiler
• Deep understanding of CMOS layout across planar, FinFET, and GAA process nodes, including DRM/DFM principles
• Expert-level physical verification skills: DRC/LVS/ERC/ANT/PERC debugging (Calibre, PVS, or equivalent)
• Strong scripting proficiency in Python, Tcl, SKILL, Perl for tool automation and flow development
• Knowledge of floorplanning, power mesh planning, critical signal routing, and hierarchical integration
• Excellent cross-team communication skills supporting multiple concurrent projects
• Familiarity with AI or Agentic AI in EDA workflows; experience in Foundation IP (IO/ESD), RF/Analog layout, SI/PI analysis, or EM/IR considerations is a plus

Interested candidates may apply through the application system. We regret that only shortlisted candidates will be notified.

PERSOL Singapore Pte Ltd • UEN No. 200007268E • EA License No. 01C4394 • EA Registration No. R22111378 (Ong Xin Yee)

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