SoC Design Verification Engineer (Junior/Senior/Principal)

About NSING:

As part of Nations Technologies Group, NSING was founded in 2018 in Singapore bringing high-performance semiconductor products and solutions to global semiconductor industry.

Our products includes General and Secure MCU, Secure IC for TPM (Trusted Platform Module), Bluetooth Low Energy BLE and BMS (Battery Management System).

When you join NSING, you will be part of a talented team in the Singapore R&D Center where we develop high performance MCU targeting for Industrial and Edge AI applications.

Your Role:

As a SoC Design Verification Engineer, you will be you would be part of a passionate team developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C co-simulation, to mixed-signal simulation and formal verification. You will be part of the Singapore team in developing high performance MCU chips.

• Develop detailed verification plans based on design specifications and architectural requirements.
• Create and maintain test benches for complex digital designs using System Verilog and UVM (Universal Verification Methodology).
• Write, debug, and execute test cases to verify functionality, performance, and power consumption of our SoC products.
• Collaborate with design engineers to identify, analyze, and resolve design issues.
• Conduct coverage analysis and drive verification closure to ensure all functional requirements are met.
• Mentor junior verification engineers, providing technical guidance and support.
• Continuously improve verification processes and methodologies to enhance efficiency and effectiveness.
• Participate in design and verification reviews, providing constructive feedback and recommendations.
• Stay updated with the latest industry trends and advancements in verification techniques and tools.

Your Skills and Experiences:

• Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

• Experience: 3 years+ prior industry experience of design verification including significant System Verilog and UVM usage.

Technical skills

• Deep knowledge of digital logic design, SOC architecture and microarchitecture

• Proficient in simulation-based verification methodologies and languages such as UVM and System Verilog

• Skilled in developing and maintaining test benches, test cases, and verification environments

• Experience across the full verification cycle from initial planning to final tape out

Preferred skills

• Knowledge of low-power design techniques and verification methodologies.

• Knowledge of hardware-software co-simulation mixed-signal verification techniques.

• Knowledge of gate level simulation methodologies.

Other Skills

• Strong analytical and problem-solving skills, with a keen attention to detail.

• Excellent communication and teamwork skills, with the ability to collaborate effectively in a cross-functional environment.

• Flexibility and adaptability and demonstrates ability to manage multiple tasks and projects, prioritizing effectively to meet deadlines.