3P engineer

Job Description & Requirements

Bachelor / Master’s degree in electrical & Electronic Engineering with at least 3 years of relevant experience in leading successful CMOS IC Test development projects.

• Experience in Advantest 93K tester (should be familiar with SMT 7 & 8) or J750

• Smartest 7 or 8 hands-on experience.

• Multiple years of experience on the V93k platform/J750

• Responsible for preparing the Production Test packages (Hardware and Software), and

• Qualification Test programs

• Ensure Timely transfer of Engineering and Production test packages for Wafersort and Final

• (Packaged) Test to various test sites

• Support SoC Test/Test Program Integrators on day to day debug and analysis as required

• based on schedule Test Program Roadmap

• Support test program buyoff 1st line support as needed inclusive of troubleshooting and

• resolutions

• Strong 93k DC testing experience

• Knowledge on Programming concepts and C/C++, Python, Java/ VBA language – preferred