Physical Design Engineer
Netlist to GDSII at block level, Subsystem Level and at Full chip. • Worked on multiple tapeouts on Netlist to GDSII • Hierarchical partitioning and budgeting of block-level subsystems. • I…
Netlist to GDSII at block level, Subsystem Level and at Full chip. • Worked on multiple tapeouts on Netlist to GDSII • Hierarchical partitioning and budgeting of block-level subsystems. • I…
Responsibilities/Job Scope: • Pre-silicon verification and post-silicon system validation • Test case and test automation scripts development and test plan execution • Debug system (hardwar…
Job Description & Requirements Develop verification environment and tests to perform Functional (RTL) testing at IP level and SoC Level Develop IP level/SoC level test plans based on the de…
Job Description & Requirements Netlist to GDSII at block level, Subsystem Level and at Full chip. Worked on multiple tapeouts on Netlist to GDSII Hierarchical partitioning and budgeting of…
Job Description & Requirements Bachelor / Master’s degree in electrical & Electronic Engineering with at least 4 years of relevant experience in leading successful CMOS IC Test development…
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