Netlist to GDSII at block level, Subsystem Level and at Full chip. Worked on multiple tapeouts on Netlist to GDSII Hierarchical partitioning and budgeting of block-level subsystems. Impleme…
ApplyResponsibilities/Job Scope: • Pre-silicon verification and post-silicon system validation • Test case and test automation scripts development and test plan execution • Debug system (hardwar…
ApplyJob Description & Requirements Bachelor / Master’s degree in electrical & Electronic Engineering with at least 3 years of relevant experience in leading successful CMOS IC Test development…
ApplyJob Description & Requirements Bachelor / Master’s degree in electrical & Electronic Engineering with at least 3 years of relevant experience in leading successful CMOS IC Test development…
ApplyNetlist to GDSII at block level, Subsystem Level and at Full chip. • Worked on multiple tapeouts on Netlist to GDSII • Hierarchical partitioning and budgeting of block-level subsystems. • I…
ApplyAbout SVENTL SVENTL Asia Pacific Pte. Ltd. is a Singapore-headquartered technology and engineering consulting company specialising in semiconductor engineering, technology solutions, and pr…
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