Junior/Senior Circuit Design Engineer (Semiconductor)

Responsibilities

• Participate in the design and development of a wide range of semiconductor IPs, including but not limited to Non-Volatile Memory (NVM), SRAM, ADC/DAC, LDO/DC-DC converters, POR, BOR, Bandgap references, amplifier circuits, PLL/DLL, and high-speed interface IPs.
• Provide technical guidance to layout engineers in the physical implementation of NVM memory arrays and associated analog peripheral circuits.
• Support the development of NVM IP Design Kits (DK), including deliverables such as Verilog models, Liberty files, datasheets, bitmaps, and related documentation.
• Assist with the design, bring-up, and validation of NVM-related test chips.
• Ensure all project activities are executed in accordance with the company's quality standards and processes.

Requirements

• Bachelor's or Master's degree in Microelectronics or a related discipline
• At least 3 years of hands-on experience in transistor-level analog and mixed-signal circuit design.
• Proficient in industry-standard analog EDA tools, including Cadence Virtuoso, Spectre, HSPICE, XA, FINESIM, and similar environments for full-custom design and simulation.
• Experience designing on advanced semiconductor technologies such as CMOS, FinFET, and FD-SOI process nodes.
• Prior experience in memory design is highly preferred.
• Understanding of semiconductor manufacturing processes and physical layout design is considered an advantage.

Interested candidates who wish to apply for the advertised position, please click 'APPLY' to submit your application

EA License No: 13C6305

Reg. No.: R1874608 (Lee Jia Hou)

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